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*Early Registration – £450.00 GBP
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Additional Paper by Same Author – £125.00 GBP (Authors should note that a registration is needed for each paper to be presented. One registration is valid for one paper. Authors presenting multiple papers need to pay an additional fee of £125.00 GBP for each extra paper up to a maximum of one extra paper. A new registration is required if the same author wishes to present more than one extra paper.)
Additional Conference Dinner Ticket – £100.00 GBP

*The last day for early registration is 6th July 2018

10.40	EvoFIT composite face construction via practitioner interviewing and a witness-administered protocol Authors: Alexander Martin¹, Peter J. B. Hancock¹, Charlie Frowd², Priscilla Heard³, Emma Gaskin³, Claire Ford² and Thomas Hewett³ Affiliation: 1-University of Stirling, UK; 2- University of Central Lancashire, UK; 3- University of the West of England, UK
11.00	Security and Complexity Bounds of SUC-Based Physical Identity Authors: Saleh Mulhem, Randa Zarrouk and Wael Adi Affiliation: Technical University Braunshcweig, Germany
11.20	On Quaternary 1-of-4 ID Generator Circuits Authors: Julian Murphy¹, Gareth Howells¹ and Klaus McDonald-Maier² Affiliation: 1-University of Kent, UK; 2- University of Essex, UK
11.40	Clone-Resistant Joint-Identity Technique for Securing Fleet Management Systems Authors: Emad Hamadaqa, Saleh Mulhem, Ayoub Mars and Wael Adi Affiliation: Technical University Braunshcweig, Germany
12.00	New Concept for Physically-Secured E-Coins Circulations Authors: Ayoub Mars and Wael Adi Affiliation: Technical University Braunshcweig, Germany

Special Session on Extreme Environments and Nuclear Robotics Session Chair: Adrian Stoica (NASA JPL)
14.20	Sensors, SLAM and Long-term Autonomy: A Review Authors: Mubariz Zaffar¹, Shoaib Ehsan¹, Rustam Stolkin² and Klaus Mcdonald Maier¹ Affiliation: 1-University of Essex, UK; 2-University of Birmingham, UK
14.40	MAT-CNN-SOPC: Motionless Analysis of Traffic Using Convolutional Neural Networks on System-On-a-Programmable-Chip Authors: Somdip Dey, Grigorios Kalliatakis, Sangeet Saha, Amit K. Singh, Shoaib Ehsan and Klaus McDonald-Maier Affiliation: University of Essex, UK
15.00	Real-Time Application Processing for FPGA-Based Resilient Embedded Systems in Harsh Environments Authors: Sangeet Saha¹, Shoaib Ehsan¹, Adrian Stoica², Rustam Stolkin³ and Klaus McDonald-Maier⁴. Affiliation: 1-University of Essex, UK; 2- California Institute of Technology, USA; 3-University of Birmingham, UK
15.20	Weather Classification: A new multi-class dataset, data augmentation approach and comprehensive evaluations of Convolutional Neural Networks Authors: Jose Carlos Villarreal Guerra¹, Zeba Khanam¹, Shoaib Ehsan¹, Rustam Stolkin² and Klaus D. McDonald-Maier¹ Affiliation: 1-University of Essex, UK; 2-University of Birmingham, UK
15.40	Coffee Break

Special Session: Intelligent Security Systems Session Chair: Ahmed Bouridane (Northumbria University)
13.45	Investigating the Use of Autoencoders for Gait-based Person Recognition Authors: Ismahane Cheheb¹, Ahmed Bouridane¹, Richard Jiang¹ and Sumaya Al-Maadeed²; Affiliation: 1- Northumbria University, UK; 2-Qatar University, Qatar
14.05	Competitive Coding Scheme Based on 2D Log-Gabor Filter for Palm Vein Recognition Authors: Larbi Boubchir, Yassir Aberni and Boubaker Daachi; Affiliation: University of Paris 8, France
14.25	A Novel Efficient Classwise Sparse and Collaborative Representation for Holistic Palmprint Recognition Authors: Imad Rida, Noor Al Maadeed and Somaya Al Maadeed; Affiliation: Qatar University, Qatar
14.45	Towards the Design of Smart Video-Surveillance System Authors: Azeddine Beghdadi¹, Muhammad Asim², Noor Almaadeed² and Muhammad Ali Qureshi³ Affiliation: 1-Université Paris 13, Sorbonne Paris Cité, France; 2- Qatar University, Qatar; 3-The Islamia University of Bahawalpur, Pakistan
15.05	Off-Line Persian Signature Verification using Wavelet-Based Fractal Dimension and One-Class Gaussian Process Authors: Sima Shariatmadari¹, Somaya Al-Maadeed², Younes Akbari², Imad Rida³ and Sima Emadi¹; Affiliation: 1-Islamic Azad University, Yazd, Iran; 2-Qatar University, Qatar; 3-LITIS-INSA
15.25	Towards a Secure Partial Reconfiguration of Xilinx FPGAs Authors: Adewale Adetomi¹, Godwin Enemali¹, and Tughrul Arslan¹ Affiliation: 1-University of Edinburgh, UK
15.45	Coffee Break

Regular Papers: Robotics and Machine Learning Session Chair: Lukas Sekanina (Brno University of Technology)
15.55	An Adaptive Telerobotics Control for Advanced Manufacturing Authors: Bilal Nasser¹, Amir Rabani², Don Freiling³ and Christian Gan³. Affiliation: 1 – Rolls-Royce plc, Derby, UK; 2-University of Nottingham, UK; 3 – Librestream, Canada
16.15	Modular And Self-Adaptable (MASA) Strategy for Building Robots Authors: Victor Mayoral, Risto Kojcev, Nora Etxezarreta, Alejandro Hernández, Irati Zamalloa and Asier Bilbao Affiliation: Erle Robotics, Spain
16.35	Delay Tolerant Network Routing as a Machine Learning Classification Problem Authors: Rachel Dudukovich¹ and Christos Papachristou² Affiliation: NASA Glenn Research Center Cleveland, Ohio, USA; 2 – Case Western Reserve University Cleveland, Ohio, USA
16.55	Pyramidal Neuron Architectures for Accelerating Deep Neural Networks on FPGA Authors: Hossam Omar, Maged Ghoneima and Mohamed Dessouky Affiliation: Ain Shams University
17.15	Adjourn

Regular Papers: Communication and Antenna
15.55	Simulation of 3D Printed Antenna System using Liquid Metal Antenna Elements Authors: Jonathan Thews¹, Alan O’Donnell² and Alan Michaels² Affiliation: John Hopkins APL, USA; 2-Virginia Tech, USA
16.15	A Low Complexity Decoding Algorithm for Spinal Codes with Efficiently Distributed Symbols Authors: Yingmeng Hu¹, Rongke Liu¹, Aryan Kaushik², Xiaoyan Shi¹ and John Thompson² Affiliation: 1- Beihang University, China; 2-University of Edinburgh, UK
16.35	A High-throughput Fine-Grained Rate Adaptive Transmission Scheme for A LEO Satellite Communication System Authors: Hongxiu Bian¹, Rongke Liu¹, Xiaoyan Shi¹ and John Thompson². Affiliation: 1-Beihang University; 2-University of Edinburgh
Poster Paper (Short)
16.55	Adaptive genetic algorithm-based method for antenna location optimization in RF relative measurement Authors: Zijie Wang¹, Rongke Liu¹, John Thompson², Weiqing Mu¹ and Xiaoyan Shi^1.2. Affiliation: 1-Beihang University, China; 2-University of Edinburgh, UK
17.00	Adjourn

AHS 2018

Registration Information

Important Update: If for any reason, you have not been able to pay through PayPal, please use the University of Edinburgh’s ePay system to register. Click here to access the ePay system. If you use ePay, please contact us once you have registered.

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Keynote speakers have been added

Regular Papers: FPGA Architecture and Hardware Applications Session Chair: Lucana Santos (European Space Agency)
10.40	Logic-Layer Field Programmable Cellular Arrays Authors: Adrian Stoica and Bryan Lara Tovar Affiliation: ADEVO – Society for Adaptive Hardware and Systems
11.00	Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs Authors: David Grochol and Lukas Sekanina Affiliation: Brno University of Technology, Czech Republic
11.20	Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic Environment Authors: Vojtech Mrazek, Zdenek Vasicek and Lukas Sekanina Affiliation: Brno University of Technology, Czech Republic
11.40	Pruning Self-Organizing Maps for Cellular Hardware Architectures Authors: Andres Upegui¹, Bernard Girau², Nicolas Rougier³, Fabien Vannel¹ and Benoît Miramond⁴ Affiliation: Hepia, HES-SO, Switzerland; 2- Université de Lorraine, CNRS, LORIA; 3- INRIA, France; LEAT, Université Côte d’Azur, France
12.00	RR4DSN: Reconfigurable Receiver for Deepwater Sensor Nodes Authors: Aliyu Dala, Adewale Adetomi, Godwin Enemali and Tughrul Arslan Affiliation: University of Edinburgh, UK
12.20	End of Session

Poster Paper (Short) Talks: FPGA Architecture and Hardware Applications Session Chair: Minoru Watanabe (Shizuoka University, Japan)
09.00	Design and Analysis of Novel Interconnects with Network-On-Chip LVDS Transmitter for Low Delay Authors: Jayshree and Gopalakrishnan Seetharaman Affiliation: National Institute of Technology Nagaland, India
09.05	R3ToS based Partially Reconfigurable Data Flow Pipelined Network on chip Authors: Poornima N¹, Dr. Santhi M², Dr. Seetharaman G³ and Tughrul Arslan⁴. Affiliation: 1- Oxford Engineering College, India; 2- Saranathan College of Engineering, India; 3- National Institute of Technology Nagaland, India; 4-university of Edinburgh, UK
09.10	Fault-Tolerant Mechanisms for Relocation-Aware Dynamic On-Chip Communication on FPGAs Authors: Adewale Adetomi, Godwin Enemali and Tughrul Arslan Affiliation: University of Edinburgh, UK
09.15	A 400 Mrad Radiation-Hardened Optoelectronic Embedded System with a Silver-Halide Holographic Memory Authors: Takumi Fujimori and Minoru Watanabe. Affiliation: Shizuoka University, Japan
09.20	Self-Healing Strategy for Transient Fault Cell Reutilization of Embryonic Array Circuit Authors: Zhai Zhang, Yao Qiu and Xiaoliang Yuan. Affiliation: Nanjing University of Aeronautics and Astronautics, Nanjing, China
09.25	K-mer Counting with FPGAs and HMC In-Memory Operations Authors: Rick Wertenbroek and Yann Thoma. Affiliation: 1-HEIG-VD School of Business and Engineering Vaud, Switzerland; 2-SHES-SO University of Applied Sciences Western Switzerland
09.30	Efficient Configuration for a Scalable Spiking Neural Network Platform by Means of a Synchronous Address Event Representation Bus Authors: Mireya Zapata¹, Janio Jadán Guerrero¹ and Jordi Madrenas². Affiliation: 1-Universidad Tecnologica Indoamerica, Ecuador; 2- Universitat Politècnica de Catalunya, Spain
09.35	HW-Based Architecture for Runtime Verification of Embedded Software on SoPC systems Authors: Dimitry Solet¹, Mikaël Briday², Jean-Luc Béchennec², Sébastien Faucou² and Sébastien Pillement¹. Affiliations: 1-IETR, Universite de Nantes ´ France, 2-LS2N, France
09.40	End of Session

ESA Special Session: Emerging Reconfigurable Devices for Space Applications: Configuration Mitigation Techniques and Radiation Characterization Session Chair: David Dolman (Alpha Data Parallel Systems Ltd)
09.00	Approximate TMR for Selective Error Mitigation Based on Testability Analysis (Authors: Antonio Sánchez¹ and Luis Entrena² Affiliation: 1 – IUMA/ULPGC 2 – Universidad Carlos III, Madrid)
09.20	A Novel Error Rate Estimation Approach for Ultrascale SRAM-based FPGAs (Authors: Luca Sterpone, Sarah Azimi, Ludovica Bozzoli, Boyang Du, Thomas Lange)
09.40	Evaluation Methodology and Reconfiguration Tests on the New European NG-MEDIUM FPGA (Konstantinos Maragos¹, Vasileios Leon¹, George Lentaris¹, Dimitrios Soudris¹, David Gonzalez-Arjona², Ruben Domingo², Antonio Pastor², David Merodio Codinachs³, Isabelle Conway³ Affiliation: 1-National Technical University of Athens, Greece; 2 – Avionics and On-Board SW division−Space Segment and Robotics, GMV Aerospace & Defense SAU, Spain; 3-Directorate of Technology Engineering and Quality, European Space Agency, ESTEC, The Netherlands)
10.00	NG-MEDIUM FPGA Reconfiguration Through Spacewire: Example Use Case and Analysis (Authors: Klemen Brahvar, Victor Martins, Lucana Santos, David Merodio Codinachs Affiliation: European Space Agency)
10.20	Coffee Break

Regular Papers: Space Applications and Reconfigurable Computing Session Chair: Lucana Santos (European Space Agency)
14.00	Fault-Tolerant Distributed Attitude and Orbit Control System for Space Applications Authors: Tanya Vladimirova and Muhammad Fayyaz Affiliation: University of Leicester, UK
14.20	Performance Analysis of SEE Mitigation Techniques on Zynq Ultrascale+ Hardened Processing Fabrics Authors: Arturo Pérez García, Andrés Otero and Eduardo de La Torre Affiliation: Universidad Politécnica de Madrid, Spain
14.40	Efficient Runtime Frame ECC Recomputation for Reliable Task Execution on Xilinx FPGAs Authors: Godwin Enemali, Adewale Adetomi and Tughrul Arslan Affiliation: University of Edinburgh, UK
15.00	Hardware and Software Task Scheduling for ARM-FPGA Platforms Authors: Alexander Doerflinger¹, Mark Albers¹, Bjoern Fiethe¹, Johannes Schlatow¹, Harald Michalik¹, Phillip Keldenich² and Sándor Fekete² Affiliation: 1- Institute of Computer and Network Engineering (IDA) TU Braunschweig Braunschweig, Germany; 2 – Algorithms Group TU Braunschweig Braunschweig, Germany
15.20	A Dynamically Reconfigurable Platform for High-Performance and Low-Power On-Board Processing Authors: Andrea Guerrieri¹, Sahand Kashani-Akhavan¹, Pasquale Lombardi², Bilel Belhadj² and Paolo Ienne¹ Affiliation: 1 – Processor Architecture Laboratory – EPFL Lausanne, Switzerland; 2 – Syderal SA Gals, Switzerland
15.40	Coffee Break