Registration Information

*Early Registration – £450.00 GBP
*Early IEEE Member Registration – £400.00 GBP
*Early Student Registration – £350.00 GBP
*Early IEEE Student Registration – £300.00 GBP
Late/On-site Registration – £500.00 GBP
Late/On-site Student Registration – £450.00 GBP
Additional Paper by Same Author – £125.00 GBP (Authors should note that a registration is needed for each paper to be presented. One registration is valid for one paper. Authors presenting multiple papers need to pay an additional fee of £125.00 GBP for each extra paper up to a maximum of one extra paper. A new registration is required if the same author wishes to present more than one extra paper.)
Additional Conference Dinner Ticket – £100.00 GBP

*The last day for early registration is 6th July 2018

Regular Paper: Machine Learning
14.30	Delay Tolerant Network Routing as a Machine Learning Classification Problem (Authors: Rachel Dudukovich¹ and Christos Papachristou² Affiliation: NASA Glenn Research Center Cleveland, Ohio, USA; 2 – Case Western Reserve University Cleveland, Ohio, USA)
14.50	Pyramidal Neuron Architectures for Accelerating Deep Neural Networks on FPGA (Authors: Hossam Omar, Maged Ghoneima and Mohamed Dessouky Affiliation: Ain Shams University)
15.10	Coffee Break

Regular: FPGA Architecture and Hardware Applications Session Chair: Didier Keymeulen (NASA JPL)
11.40	Logic-Layer Field Programmable Cellular Arrays (Authors: Adrian Stoica and Bryan Lara Tovar Affiliation: ADEVO- Society for Adaptive Hardware and Systems)
12.00	Fast Reconfigurable Hash Functions for Network Flow Hashing in FPGAs (Authors: David Grochol and Lukas Sekanina Affiliation: Brno University of Technology, Czech Republic)
12.20	Design of Quality-Configurable Approximate Multipliers Suitable for Dynamic Environment (Authors: Vojtech Mrazek, Zdenek Vasicek and Lukas Sekanina Affiliation: Brno University of Technology, Czech Republic)
12.40	Pyramidal Neuron Architectures for Accelerating Deep Neural Networks on FPGA (Authors: Hossam Omar, Maged Ghoneima and Mohamed Dessouky Affiliation: Ain Shams University)
13.00	RR4DSN: Reconfigurable Receiver for Deepwater Sensor Nodes (Authors: Aliyu Dala, Adewale Adetomi, Godwin Enemali and Tughrul Arslan Affiliation: University of Edinburgh, UK)
13.20	Pruning Self-Organizing Maps for Cellular Hardware Architectures (Authors: Andres Upegui¹, Bernard Girau², Nicolas Rougier³, Fabien Vannel¹ and Benoît Miramond⁴ Affiliation: Hepia, HES-SO, Switzerland; 2- Université de Lorraine, CNRS, LORIA; 3- INRIA, France; LEAT, Université Côte d’Azur, France)

Poster Paper (Short) Talks: Network on Chip Session Chair: David Merodio Codinachs (European Space Agency)
14.00	Design and Analysis of Novel Interconnects with Network-On-Chip LVDS Transmitter for Low Delay (Authors: Jayshree Jayshree and Seetharaman Gopalakrishnan Affiliation: National Institute of Technology Nagaland, India)
14.10	R3ToS based Partially Reconfigurable Data Flow Pipelined Network on chip (Authors: Poornima N¹, Dr. Santhi M², Dr. Seetharaman G³ and Tughrul Arslan⁴. Affiliation: 1- Oxford Engineering College, India; 2- Saranathan College of Engineering, India; 3- National Institute of Technology Nagaland, India; 4-university of Edinburgh, UK)
14.20	Fault-Tolerant Mechanisms for Relocation-Aware Dynamic On-Chip Communication on FPGAs (Authors: Adewale Adetomi, Godwin Enemali and Tughrul Arslan Affiliation: University of Edinburgh, UK)

Poster Paper (Short) Talks: FPGA Architecture and Hardware Applications Session Chair: David Merodio (European Space Agency)
10.50	A 400 Mrad Radiation-Hardened Optoelectronic Embedded System with a Silver-Halide Holographic Memory (Authors: Takumi Fujimori and Minoru Watanabe. Affiliation: Shizuoka University, Japan)
11.00	Self-Healing Strategy for Transient Fault Cell Reutilization of Embryonic Array Circuit (Authors: Zhai Zhang, Yao Qiu and Xiaoliang Yuan. Affiliation: Nanjing University of Aeronautics and Astronautics, Nanjing, China)
11.10	K-mer Counting with FPGAs and HMC In-Memory Operations (Authors: Rick Wertenbroek and Yann Thoma. Affiliation: 1-HEIG-VD School of Business and Engineering Vaud, Switzerland; 2-SHES-SO University of Applied Sciences Western Switzerland)
11.20	Efficient Configuration for a Scalable Spiking Neural Network Platform by Means of a Synchronous Address Event Representation Bus (Authors: Mireya Zapata¹, Janio Jadán Guerrero¹ and Jordi Madrenas². Affiliation: 1-Universidad Tecnologica Indoamerica, Ecuador; 2- Universitat Politècnica de Catalunya, Spain)
11.30	HW-Based Architecture for Runtime Verification of Embedded Software on SoPC systems (Authors: Dimitry Solet¹, Mikaël Briday², Jean-Luc Béchennec², Sébastien Faucou² and Sébastien Pillement¹. Affiliations: 1-IETR, Universite de Nantes ´ France, 2-LS2N, France)

Regular Paper: Communication and Antenna I Session Chair: Prof Ahmed Bouridane (Northumbria University)
16.20	A L-Shaped Frequency Reconfigurable MIMO Dielectric Resonator Antenna for PCS Band Applications (Authors: Shahid Khan¹, Hazrat Ali, Rizwan Khan¹, Ramenah Harry¹ and Camel Tanougast¹ Affiliation: 1-University de Lorraine, Metz, France; 2- COMSATS Institute of Information Technology, Abbottabad, Pakistan)
16.40	A High-throughput Fine-Grained Rate Adaptive Transmission Scheme for A LEO Satellite Communication System (Authors: Hongxiu Bian¹, Rongke Liu¹, Xiaoyan Shi¹ and John Thompson². Affiliation: 1-Beihang University; 2-University of Edinburgh)
17.00	Adjourn

AHS 2018

Registration Information

Registrant Information

Send in your best papers for a chance to win awards/prizes.

Keynote speakers have been added

ESA’s Special Session: Emerging Reconfigurable Devices for Space Applications: Configuration Mitigation Techniques and Radiation Characterization Session Chair: Prof Tanya Vladimirova (University of Leicester)
09.00	Approximate TMR for selective error mitigation based on testability analysis (Authors: Antonio Sánchez¹ and Luis Entrena² Affiliation: 1 – IUMA/ULPGC 2 – Universidad Carlos III, Madrid)
09.30	A Novel Error Rate Estimation Approach for Ultrascale SRAM-based FPGAs (Authors: Luca Sterpone, Sarah Azimi, Ludovica Bozzoli, Boyang Du, Thomas Lange)
10.00	Evaluation Methodology and Reconfiguration Tests on the new European NG-MEDIUM FPGA (Konstantinos Maragos¹, Vasileios Leon¹, George Lentaris¹, Dimitrios Soudris¹, David Gonzalez-Arjona², Ruben Domingo², Antonio Pastor², David Merodio Codinachs³, Isabelle Conway³ Affiliation: 1-National Technical University of Athens, Greece; 2 – Avionics and On-Board SW division−Space Segment and Robotics, GMV Aerospace & Defense SAU, Spain; 3-Directorate of Technology Engineering and Quality, European Space Agency, ESTEC, The Netherlands)
10.30	NG-MEDIUM FPGA Reconfiguration through Spacewire: example use case and analysis (Authors: Klemen Brahvar, Victor Martins, Lucana Santos, David Merodio Codinachs Affiliation: European Space Agency)
11.00	Coffee Break

Regular Papers: Robotics Session Chair: Lucana Santos (European Space Agency)
16.30	An Adaptive Telerobotics Control for Advanced Manufacturing (Authors: Bilal Nasser¹, Amir Rabani², Don Freiling³ and Christian Gan³. Affiliation: 1 – Rolls-Royce plc, Derby, UK; 2-University of Nottingham, UK; 3 – Librestream, Canada)
16.50	Modular And Self-Adaptable (MASA) Strategy for Building Robots (Authors: Victor Mayoral, Risto Kojcev, Nora Etxezarreta, Alejandro Hernández, Irati Zamalloa and Asier Bilbao Affiliation: Erle Robotics, Spain)
17.15	Adjourn

Regular Papers: Space Applications and Reconfigurable Computing I Session Chair: Lucana Santos (European Space Agency)
14.15	The Intelligent Computer Aided Satellite Designer iCASD – Creating Viable Configurations for Modular Satellites (Authors: Timothee Buettner, Atanas Tanev, Lars Pfotzer, Arne Roennau and Ruediger Dillmann Affiliation: FZI Research Center for Information Technology)
14.35	Fault-Tolerant Distributed Attitude and Orbit Control System for Space Applications (Authors: Tanya Vladimirova and Muhammad Fayyaz Affiliation: University of Leicester, UK)
14.55	Performance Analysis of SEE Mitigation Techniques on Zynq Ultrascale+ Hardened Processing Fabrics (Authors: Arturo Pérez García, Andrés Otero and Eduardo de La Torre Affiliation: Universidad Politécnica de Madrid, Spain)
15.15	Efficient Runtime Frame ECC Recomputation for Reliable Task Execution on Xilinx FPGAs (Authors: Godwin Enemali, Adewale Adetomi and Tughrul Arslan Affiliation: University of Edinburgh, UK)
15.35	Coffee Break

Regular Papers: Space Applications II Session Chair: David Dolman (Alpha Data Parallel Systems Ltd)
11.10	High Performance Space Computing with System-on-Chip Instrument Avionics for Space-based Next Generation Imaging Spectrometers (NGIS) (Authors: Didier Keymeulen¹, Simon Shin¹, Jason Riddley¹, Matthew Klimesh¹, Aaron Kiely¹, Elliott Liggett¹, Peter Sullivan¹, Michael Bernas¹, Hamid Ghossemi¹, Greg Flesch¹, Michael Cheng¹, Sam Dolinar¹, David Dolman², * Kevin Roth², * Chris Holyoake², * Ken Crocker², * Adam Smith² Affiliation: 2 – NASA Jet Propulsion Laboratory, USA; 2 – Alpha Data Inc., UK)
11.30	Electro-Magnetic Launchers on the Moon (Authors: Luigi Mascolo¹ and Adrian Stoica² Affiliation: 1 – Politecnico di Torino, Italy; 2 – Society for Adaptive Hardware and Systems, USA)
12.00	Keynote Address: Future AI and Robotics for Space (FAIR-SPACE) Professor Yang Gao, FIET, FRAeS Associate Dean (International), Professor of Space Autonomous Systems University of Surrey, UK Chair: Prof Tughrul Arslan
13.15	Lunch